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JPCUB Competitive Landscape v2.0: System-Level Joules-per-Solution Estimates for 17 Quantum Computing Platforms from Published Specifications
In the paper's words
The JPCUB P0 protocol (https://papers.qnfo.org/papers/joules-per-solution-metric/) defines the joules-per-solution metric — total system energy per correct answer — as a universal, physics-grounded benchmark for computational platforms. The qwav.tech competitive landscape displays six platforms with one published measurement (IBM Eagle at $0.89$ J/solution) and five entries listed as "Not yet measured" or "design target." This paper v2.0 expands the landscape to 17 platforms — 13 gate-model quantum processors spanning three architectures (superconducting, trapped-ion, neutral-atom) from 7 vendors, plus 4 non-gate-model or pre-commercial entries. JPCUB estimates are computed from published specifications using a consistent system-level power model.
The abstract, verbatim, and its opening sentence is the claim. Every line below is quoted from the text.
Numbers it reports
A 15 kW superconducting platform with 300 ns gates outperforms a 3.5 kW trapped-ion platform with 100 $\mu$s gates by approximately $100\times$ on JPCUB, because the factor-of-333 gate-time difference overwhelms the factor-of-4.3 power advantage.
from 1.4 Core ClaimCorrectness threshold $\varepsilon$: $0.95$ (95% success rate).
from 2.1 Task SpecificationPlatform Qubits $P_{\mathrm{sys}}$ 1Q Gate 2Q Gate 2Q Fidelity Source Google Willow 105 25.0 kW 20 ns 30 ns 99.95% Google Sycamore 53 25.0 kW 25 ns 40 ns 99.8% IQM Garnet 20 12.0 kW 100 ns 200 ns 99.5% IBM Heron r2 133 15.0 kW 170 ns 300 ns 99.7% IBM Eagle r3 127 15.0 kW 288 ns 500 ns 99.0% $[$established — JPCUB P0 published at 0.89 J/sol$]$ Rigetti Ankaa-3 84 15.0 kW 200 ns 400 ns 98.0% Rigetti Aspen-M-3 80 15.0 kW 200 ns 400 ns 97.5% Architecture notes: All seven platforms share the same physical infrastructure — superconducting transmon qubits operating at approximately 15 mK in a dilution refrigerator.
from 3.1 Superconducting Transmon (7 platforms)Differences in JPCUB derive from gate speed (20–500 ns for two-qubit gates) and gate fidelity (97.5–99.95%).
from 3.1 Superconducting Transmon (7 platforms)Platform Qubits $P_{\mathrm{sys}}$ 1Q Gate 2Q Gate 2Q Fidelity Source Quantinuum H1-1 20 4.0 kW $10 \mu s$ $50 \mu s$ 99.8% Quantinuum H2 56 4.5 kW $10 \mu s$ $50 \mu s$ 99.8% IonQ Aria 25 3.0 kW $20 \mu s$ $100 \mu s$ 99.4% IonQ Forte 36 3.5 kW $20 \mu s$ $100 \mu s$ 99.5% Architecture notes: Trapped-ion systems operate at room temperature — no dilution refrigerator, no millikelvin cryogenics.
from 3.2 Trapped Ions (4 platforms)Platform Atoms $P_{\mathrm{sys}}$ 1Q Gate 2Q Gate 2Q Fidelity Source QuEra Aquila 256 4.0 kW 500 ns $1.5 \mu s$ 99.5% Pasqal Fresnel 100+ 4.0 kW 500 ns $2.0 \mu s$ 98.0% Architecture notes: Neutral-atom platforms use Rydberg blockade for two-qubit entanglement — gates in the 1–2 $\mu s$ range, significantly faster than trapped ions but approximately 5–50× slower than the best superconducting gates.
from 3.3 Neutral Atoms (2 platforms)
How it is done
The JPCUB P0 protocol (https://papers.qnfo.org/papers/joules-per-solution-metric/) defines the joules-per-solution metric — total system energy per correct answer — as a universal, physics-grounded benchmark for computational platforms.
from AbstractThe joules-per-solution metric $J_S(T, \varepsilon)$ $[$established$]$ defines the total system-level energy (joules) consumed by system $S$ to produce a solution to computational task $T$ at correctness threshold $\varepsilon$: $$J_S(T, \varepsilon) = E_S(T, \varepsilon) = E_{\text{comp}} + E_{\text{mem}} + E_{\text{io}} + E_{\text{cool}} + E_{\text{conv}} + E_{\text{mfg}}$$ The protocol is published, open, and falsifiable.
from 1.1 The JPCUB MetricApplies consistent methodology — the same system-level power model to all 13 gate-model platforms, using the same task ($N = 15$, Shor's algorithm, $\varepsilon = 0.95$) and the same gate-count model.
from 1.2 The Gap in the qwav.tech LandscapeIt would be disconfirmed if independent JPCUB measurement following the P0 protocol on at least one trapped-ion platform and at least one superconducting platform showed the trapped-ion platform achieving lower joules-per-solution than the superconducting platform for the same task. $[$speculative$]$
from 1.4 Core Claim
What would falsify it
The joules-per-solution metric $J_S(T, \varepsilon)$ $[$established$]$ defines the total system-level energy (joules) consumed by system $S$ to produce a solution to computational task $T$ at correctness threshold $\varepsilon$: $$J_S(T, \varepsilon) = E_S(T, \varepsilon) = E_{\text{comp}} + E_{\text{mem}} + E_{\text{io}} + E_{\text{cool}} + E_{\text{conv}} + E_{\text{mfg}}$$ The protocol is published, open, and falsifiable.
from 1.1 The JPCUB MetricIt would be disconfirmed if independent JPCUB measurement following the P0 protocol on at least one trapped-ion platform and at least one superconducting platform showed the trapped-ion platform achieving lower joules-per-solution than the superconducting platform for the same task. $[$speculative$]$
from 1.4 Core ClaimThis has implications for the JPCUB calibration register [, §6]: the CAL-01 prediction ("No gate-model quantum computer will solve a commercially relevant problem at lower joules-per-solution than the best classical alternative by 2030") must account for both gate-speed and fidelity trajectories.
from 6.2 Fidelity as the Second Factor
Where the claim stops
This finding has direct implications for the JPCUB research program: the P1 quantum energy audit must account for both gate-speed and cooling-power trajectories across modalities; the P9 Comparative Atlas must include an explicit time–power decomposition for each paradigm; and the CAL-01 prediction ("no quantum computer will beat classical on JPCUB by 2030") must specify gate-speed assumptions as well as fidelity assumptions.
from 10. ConclusionThe qwav.tech competitive landscape displays six platforms with one published measurement (IBM Eagle at $0.89$ J/solution) and five entries listed as "Not yet measured" or "design target." This paper v2.0 expands the landscape to 17 platforms — 13 gate-model quantum processors spanning three architectures (superconducting, trapped-ion, neutral-atom) from 7 vendors, plus 4 non-gate-model or pre-commercial entries.
from AbstractTrapped-ion platforms, despite room-temperature operation eliminating the dilution refrigerator, rank lowest because microsecond-scale gate times (approximately $125\times$ slower than superconducting) produce execution energies that overwhelm the cooling-power advantage.
from Abstract
Where to read
- Abstract209 words · 1 min
- 1. Introduction366 words · 2 min
- 2. Methodology310 words · 1 min
- 3. Platform Specifications402 words · 2 min
- 4. Results: JPCUB Estimates for 13 Gate-Model Platforms296 words · 1 min
- 5. Architecture Group Analysis511 words · 2 min
- 6. Discussion816 words · 4 min
- 7. Limitations182 words · 1 min
- 8. JPCUB Baselines: Existing Computing Architectures530 words · 2 min
- 9. Total Joules for Classically-Infeasible Problems1,165 words · 5 min
- 10. Conclusion263 words · 1 min
- Declarations193 words · 1 min
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